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nl6448ac33 - 15 tft color lcd module 26 cm (10.4 type), 640 480 pixels full colors, incorporated two-lamp/edge-light type backlight document no. en0322ej1v0ds00 date published july 1997 m printed in japan 1997 description NL6448AC33-15 is a tft (thin film transistor) active matrix color liquid crystal display (lcd) comprising amorphous silicon tft attached to each signal electrode, a driving circuit and a backlight. nl6448ac33-5 has a built-in backlight. the 26 cm diagonal display area contains 640 480 pixels and can display full colors simultaneously. features a full color (analog rgb interface) a multi scan fanction (vga, pc9801, mac, ntsc and pal) a reverse scan function a high luminous (200 cd/m 2 ) / low reflection a incorporated edge type backlight (two lamps. include inverter) a data enable function a lamp holder replacable applications a personal computers (pc). word processor a display terminals for control system a monitors for process controller data sheet the information in this document is subject to change without notice.
2 nl6448ac33 - 15 structure and functions a color tft (thin film transistor) lcd module is comprised of a tft liquid crystal panel structure, lsis for driving the tft array, and a backlight assembly. the tft panel structure is created by sandwiching liquid crystal material in the narrow gap between a tft array glass substrate and a color filter glass substrate. after the driver lsis are connected to the panel, the backlight assembly is attached to the backside of the panel. rgb (red, green, blue) data signals from a source system is modulated into a form suitable for active matrix addressing by the onboard signal processor and sent to the driver lsis which in turn addresses the individual tft cells. acting as an electro-optical switch, each tft cell regulates light transmission from the backlight assembly when activated by source. by regulating the amount of light passing through the array of red, green, and blue dots, color images are created with clarity. outline of characteristics (at room temperature) display area 211.2 (h) 158.4 (v) mm drive system a-si tft active matrix display colors full colors number of pixels 640 480 pixel arrangement rgb vertical stripe pixel pitch 0.33 (h) 0.33 (v) mm module size 251.0 (h) 196.0 (v) 18.0 typ. (d) mm weight 750 g (typ.) contrast ratio 150 : 1 (typ.) viewing angle (more than the contrast ratio of 10 : 1) ? horizontal : 50 (typ. left side, right side) ? vertical : 15 (typ. up side), 45 (typ. down side) designed viewing direction (normal scanning) ? wider viewing angle with contrast ratio : down side (6 o'clock) ? wider viewing angle without image reversal : up side (12 o'clock) ? optimum grayscale ( g = 2.2) : perpendicular color gamut 55% (typ. at center, to ntsc) response time 40 ms (max.), "white" to "black" luminance 200cd/m 2 (typ.) signal system analog rgb signals, synchronous signals (hsync, vsync), dot clock (clk) supply voltage 5.0 v, 12 v, 12 v backlight edge light type: two fluorescent lamps (cold cathode type) power consumption 9.4 w (typ.)
3 nl6448ac33 - 15 block diagram i / f lcd module r brightness b brightness brightness clk hsync vsync de mode field cntstb cntdat v cc v dd1 v ccoffo cntclk v dd2 aca inverter dc/dc converter +5 v +12 v on/ off on/ off backlight analog h-driver v - driver analog h-driver 960 lines amp analog i / f lcd timing controller h : 640 3 (r, g, b) v : 480 (lcd panel) 480 lines gndb frame gnd gnds brtc brth, l r g b 960 lines
4 nl6448ac33 - 15 specifications 1. general specifications item specification unit module size 251.0 1.0 (h) 196.0 1.0 (v) 18.5 (d) (max.) mm (inverter portion: 24.0 (d) (max.)) display area 211.2 (h) 158.4 (v) mm 26 cm (10.4 type) number of pixels 640 (h) 480 (v) dot dot pitch 0.11 (h) 0.11 (v) mm pixel pitch 0.33 (h) 0.33 (v) mm pixel arrangement rgb (red, green, blue) vertical stripe C display colors full color color weight 780 (max.) g 2. absolute maximum ratings parameter symbol rating unit remarks supply voltage v dd1 0 to 15 v v dd2 0 to 15 v v cc C0.3 to 6.0 v logic signals v in1 C0.3 to vcc+0.3 v ta = 25 c input voltage include brightness analog rgb v in2 C4.0 to 4.0 v input voltage storage temp. t st C20 to 60 cC operating temp. t op 0 to 50 c module surface note 1 humidity r h 95 % relative humidity C ta 40 c (no condensation) 85 % relative humidity C 40 c < ta 50 c absolute humidity shall 50 c < ta not exceed ta = 50 c, 85% C relative humidity level note 1 : measured at the display area note 1 : dot r, g or b pixel r g b < = < = < = < =
5 nl6448ac33 - 15 3. electrical characteristics (1) logic, lcd driving (ta = 25 c) parameter supply voltage logic input l voltage logic input h voltage logic input l current 1 logic input h current 1 logic input l current 2 logic input h current 2 logic input l current 3 logic input h current 3 logic input l current 4 logic input h current 4 logic input l current 5 logic input h current 5 logic input l current 6 logic input h current 6 logic input l current 7 logic input h current 7 video signal amplitude (max.) white-black video dignal input range supply current note 3 symbol v dd1 v cc v dil v dih i il1 i ih1 i il2 i ih2 i il3 i ih3 i il4 i ih4 i il5 i ih5 i il6 i ih6 i il7 i ih7 v irgb v idcrgb i dd1 i cc min. 11.4 4.75 0 2.2 C1200 C C1500 C 325 C C20 C C130 C C90 C C670 C 0 C2.5 C C typ. 12.0 5.0 C C C C C C C C C C C C C C C C C C 150 80 max. 12.6 5.25 0.8 v cc C 20 C 320 C 325 C 325 C 130 C 10 C 80 0.7 2.5 220 120 unit v v v v m a m a m a m a m a m a m a m a m a m a m a m a m a m a v pCp v pCp ma ma remark clk note1, note2 vccoffo note1, note2 vccoffo note1, note2 hsync, vsync de, vud, mode cntdat, cntstb cntclk, field note1, note2 r bright, bbright bright note1, note2 aca note1, note2 brtc note1, note2 zi = 75 w note1 note1 note1 note 1 : iilx : v i = gnd, iihx : v i = v cc note 2 : measured at the dot-checked pattern
6 nl6448ac33 - 15 (2) back light ta = 25 c, brightness : 100% parameter supply voltage supply current logic input l voltage logic input h current logic input l current logic input h current symbol v dd2 i ddb v inl v inh i il i ih min. 11.4 C 0 2.2 C1000 C typ. 12.0 600 C C C C max. 12.6 850 0.8 5.5 C 1000 unit v ma v v m a m a remark vdd2 = 12.0 v typical luminance for brtc, aca terminal a base level : gndb for logic input terminal for logic input terminal
7 nl6448ac33 - 15 4. supply voltage sequence v dd2 , brtc v ccoffo v dd1 v cc 0< 0< 0< time 0< logic signals note 1 synchronous signals, control signals note 2 note 1 caution wrong power sequence may damage to the module. note 1 : brtc (v dd2 ) should operate after v cc , v dd1 and v ccoffo input in the lcd module. brtc (v dd2 ) had better be input the lcd module in more than 250 ms after v ccoffo , if you want to avoid an ununiformity display for a moment. note 2 : logic signals (hsync, vsync, clk, de, field, mode, cntsel, cntdat, cntstb, cntclk, cpsel, clamp) should be lor open, when v cc and v dd1 are not input. note 3 : the on / off switching of backlight should operate while hsync, vsync, clk, de (for de mode) are supplied. if the backlight power supply (v dd2 ) is turn on / off without logic signals, unstable data will be displayed. note 4 : analog rgb input are independent from this power supply sequence.
8 nl6448ac33 - 15 5. interface and pin connection (1) connector for logic signal and supply voltage cn1 : ilCzC10plCsmty adaptable socket : ilCz-10sCs125c3 supplier : japan aviation electronics industry limited (jae) no. symbol function no. symbol function 1 r red video signal 6 gnds signal gnd 2 gnds signal gnd 7 hsync horizontal sync. 3 g green video signal 8 gnds signal gnd 4 gnds signal gnd 9 vsync vertical sync. 5 b blue video signal 10 gnds signal gnd note 1 : when v ccoffo is l or open, v cc and v dd1 are turned off. when v ccoffo are h, v cc and v dd1 are turned on. note 2 : the wire for the connector should use the shielded wire (awg#28). note 3 : signal ground (gnds) is separated from frame ground (front cover). cn2 : ilCzC13plCsmty adaptable socket : ilCzC13sCs125c3 supplier : japan aviation electronics industry limited (jae) no. symbol function no. symbol function 1 gnd logic gnd 8 v dd1 power supply 2 clk dotclock 9 v dd1 power supply 3 gnd logic gnd 10 v ccoffo on/off for v cc ,v dd1 4 de data enable 11 gnd logic gnd 5 vud scanning select 12 v cc power supply 6 gnd logic gnd 13 gnd logic gnd 7 mode timing mode select note 1 : mode l or open = fixed mode h = de mode note 2 : vud l or open = normal scanning wider viewing angle without image reversal : up side (12 o'clock) wider viewing angle with contrast ratio : down side (6 o'clock) h = reverse scanning wider viewing angle without image reversal : down side (6 o'clock) wider viewing angle with contrast ratio : up side (12 o'clock) note 3 : signal ground (gnds) is separated from frame ground (front cover).
9 nl6448ac33 - 15 (2) connector for display control cn3 : ilCzC11plCsmty adaptable socket : ilCz-11sCs125c3 supplier : japan aviation electronics industry limited (jae) no. symbol function 1v dd2 2v dd2 3v dd2 4 gndb b / l ground 5 gndb 6 gndb supply voltage for back light (b / l) no. symbol function 7 aca luminance select 8 brtc on / off for b / l 9brth 10 brtl 11 n. c. C C C luminance control note 1 : backlight ground is connected with frame ground (front cover). note 2 : n. c. (no connection) should be open. cn4 : ilCzC15plCsmty adaptable socket : ilCz-15sCs125c3 supplier : japan aviation electronics industry limited (jae) no. symbol function 1 gnd logic gnd 2 cntsel control signal 3 cntdat control data 4 cntstb latch pulse 5 gnd logic gnd 6 cntclk for control data 7 n. c. C C C 8 n. c. C C C no. symbol function 9 gnd logic gnd 10 field field signal 11 gnd logic gnd 12 n. c. C C C 13 r brightness brightness control for red 14 b brightness brightness control for blue 15 brightness brightness control note 1 : logic ground (gnd) is separated from frame ground (front cover). note 2 : n. c. (no connection) should be open.
10 nl6448ac33 - 15 (3) detail of interface signal symbol i/o logic description r i positive red video signal (0.7 vp-p, 75 w ) g i positive green video signal (0.7vp-p, 75 w ) b i positive blue video signal (0.7vp-p, 75 w ) hsync i negative horizontal synchronous signal (ttl level) vsync i negative vertical synchronous signal (ttl level) clk i negative dot clock timing signal for display data de i positive data enable signal (ttl level) de recognize video signals when mode is h de is controlled by mode (timing mode select) field i C field signal this signal judges the first field or the second field in ntsc / pal signal input. mode i C timing mode select signal (ttl level) l or open = fixed mode h = de mode brth i C brtl i C brtc i positive backlight on/off control signal (ttl level) h or open = backlight on l = backlight off backlight luminance control connect 10 k w variable resistor ( * 1) or voltage control ( * 2) note 1 : the variable resistor for luminance control should be 10 k w type, and zero point of the resistor corresponds to the minimum luminance. note 2 : in case of voltage control for brightness by brth / brtl, at first, set brth to be 0 v and brtl input voltage can control the brightness. when brtl input voltage is 1 v the luminance become maximum. and when its voltage is 0 v, the luminance becomes minimum. brth brtl (10 k w 5%, b curve)
11 nl6448ac33 - 15 symbol i/o logic aca i positive v ccoffo iC v cc CC v dd1 CC gnd C C gnds C C gndb C C cntsel i C cntdat i positive cntclk i positive cntstb i positive brightness i C r brightness i C b brightness i C description luminance select signal h or open = normal luminance l = low luminance (1 / 2 of normal luminance) v cc and v dd1 on / off control signal (ttl level) h or open = power on in lcd module. l = power off in lcd module. power supply voltage for logic vcc = +5 v 5 % power supply voltage for lcd driving v dd1 = +12 v 5 % logic ground for v cc and v dd1 signal ground for video, hsync and vsync gnds should be separated from gnd in order to avoid disturbing noise. backlight ground display control signal in case of serial communication. h or open = internal control (default) l = external control external control is set in cntdat, cntclk and cntstb. display control data (serial data) (ttl level) clk for display control data (ttl level) latch pulse for display control data (ttl level) input voltage for the tone of black (refer to brightness control) input voltage for the tone of black in red (refer to brightness control) input voltage for the tone of black in blue (refer to brightness control) (4) interface pin connection (to p side) rear view inverter cn3 cn1 interface connector cn4 cn2 11 1 10 1 13 1 15 1 (bottom side)
12 nl6448ac33 - 15 6. brightness control the brightness control can adjust the tone of black. this function is used for making the white balance of each color by users. when the balance is adjusted, each voltage should not be changed. the brightness terminals should be opened in case of not using them. brightness controls the total level of black for r, g and b. r/g brightness controls the black level of each color. r/g brightness controls the differetiation of black level which is determined by brightness. constant pedestal level brightness : this level must be controlled. white level black level control range r brightness C0.1 v (brightness C r brightness) 0.4 v b brightness C0.1 v (brightness C b brightness) 0.4 v input voltage unit : volt sign min. typ. max. brightness 2.2 3.2 4.2 r brightness C 3.0 C b brightness C 3.0 C < = < = < = < =
13 nl6448ac33 - 15 7. control data using the serial data, following functions can be utilized as follows. (1) the set of display mode : table 1. (2) the display-position adjustment(horizontal) : table 2. (3) the display-position adjustment(vertical) : table 3. (4) clk?delay : table 4. (5) under-scan mode : table 5 and 6. (6) masking mode : table 7. cntsel = l : above functions are effective. cntsel = h or open : internal fixed value (default) is effective after serial data are transferred into the module, it is latched by cntstb. the above functions are effective after the data is latched. please keep cntstb to be "l" during transferring data. the serial data can be changed at any time, however, the display may be interrupted. we recommend that the backlight is turned-off by rbtc signal during changing the serial data. serial communication timing and waveform invalid cntdat cntstb cntclk invalid d0 d1 d2 d3 d28 d29 d30 d31 parameter symbol min. max. unit remark clk pulse width twck 50 C ns cntclk clk frequency fclk C 5 mhz data setup-time tdst 50 C ns cntdat data hold-time tdhl 50 C ns latch-pulse width twlp 50 C ns cntstb latch setup-time tlst 50 C ns rise/fall time tr, tf C 50 ns cnt cntdat 50% vcc gnd vcc gnd vcc gnd 50% 90% 10% 50% t dst t dh1 t wck t wlp t lst tr tf cntclk cntstb
14 nl6448ac33 - 15 cntdat composition data data name function d0 usc0 line position for single-scan see table 6 d1 usc1 line position for single-scan d2 usc2 line position for single-scan d3 mod0 display mode selection see table 1 d4 mod1 display mode selection d5 mod2 display mode selection d6 mod3 display mode selection d7 uscan under-scan selection see table 5 and 6 d8 hd0 horizontal display position (lsb) see table 3 d9 hd1 horizontal display position d10 hd2 horizontal display position d11 hd3 horizontal display position d12 hd4 horizontal display position d13 hd5 horizontal display position d14 hd6 horizontal display position d15 hd7 horizontal display position (msb) d16 vd0 vertical display position (lsb) see table 2 d17 vd1 vertical display position d18 vd2 vertical display position d19 vd3 vertical display position d20 vd4 vertical display position d21 vd5 vertical display position (msb) d22 msk0 masking mode selection see table 7 d23 msk1 masking mode selection d24 C d25 C C d26 C d27 dely0 clk delay (lsb) see table 4 d28 dely1 clk delay d29 dely2 clk delay d30 dely3 clk delay d31 dely4 clk delay (msb) input data should be h or l lsb : least significant bit msb : most significant bit
15 nl6448ac33 - 15 table 1 display mode selection (mod0 to 3 : 4 bit) mod3 mod2 mod1 mod0 display mode mode no. remark 0000 vga (640 480) 0 640 480 0001 vga (640 400) 1 640 400 0010 pc9801 (640 480) 2 640 480 0011 pc9801 (640 400) 3 640 400 0100 mac 4 640 480 0101 ntsc 5 C 0110 pal 6 C 0111 invalidity 7 to 15 same as mode 0 1xxx table 2 vertical display position (vd0 to vd5 : 6 bit) vd5 vd4 vd3 vd2 vd1 vd0 vertical display position * 1 mode 0, 2, 4 mode 5, 6 mode 1, 3 000000 prohibit 000001 000010 000011 000100 4 ?????? ? ?????? ? ?????? ? 100111 39 101000 40 101001 41 prohibit ?????? ? ?????? ? 111110 62 111111 63 table 3 horizontal display position (hd0 to hd7 : 8 bit) hd7 hd6 hd5 hd4 hd3 hd2 hd1 hd0 horizontal display position * 1 00000000 prohibit 00000001 00000010 ???????? ???????? 00011100 00011101 29 00011110 30 ???????? ? ???????? ? ???????? ? 11111101 253 11111110 254 11111111 255 note 1 : this is horizontal line number from hsync-fall to effective video signal (thp + thb). note 1 : this is vertical line number from vsync-fall to effective video signal (tvp + tvb).
16 nl6448ac33 - 15 table 4 clock (clk) delay (delay0 to delay5 : 5 bit) delay5 delay3 delay2 delay1 delay0 delay value [ns] mode 1, 2, 3, 4 mode 5, 6 0 0 0 0 0 (0) (0) 0 0 0 0 1 (1.5) (2.0) ????? ? ? ????? ? ? ????? ? ? 1 1 1 1 0 (45.0) (60.0) 1 1 1 1 1 (46.5) (62.0) note 1 : delay value is approximate.
17 nl6448ac33 - 15 table 5 under-scan selection uscan function 1 under-scan on 0 under-scan off note 1 : under-scan is effective in display mode no.5 or 6. note 2 : a line of single-scan is every sixth line in ntsc mode. (vertical magnification : 11/6) note 3 : six lines of single-scan is every thirteen line in pal mode. (vertical magnification : 20/13) note 4 : single-scan position of ntsc mode is mentioned in table 6. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 * 5 line first field pal mode (mode no.6) line no. these pstterns are repeated. 5 line 6 line 7 line 7 line 8 line 9 line 9 line 10 line 11 line 11 line 12 line 13 line 13 line 14 line 15 line 15 line 16 line 17 line 17 line : single-scan display area signal input over-scan under-scan abcdefghijkl abcdefghijkl ab 317 line second field 318 line 318 line 319 line 320 line 320 line 321 line 322 line 322 line 323 line 324 line 324 line 325 line 326 line 326 line 327 line 328 line 328 line 329 line 330 line
18 nl6448ac33 - 15 line no. [0, 0, 0] 1'st 2'nd [0, 0, 1] 1'st 2'nd [0, 1, 0] usc [2, 1, 0] 1'st 2'nd [0, 1, 1] 1'st 2'nd [1, 0, 0] 1'st 2'nd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 8 8 9 9 10 10 11 11 12 12 13 14 14 15 15 16 16 17 17 18 18 19 20 20 21 8 9 9 10 10 11 11 12 12 13 13 14 15 15 16 16 17 17 18 18 19 19 20 21 21 8 8 9 9 10 10 11 11 12 13 13 14 14 15 15 16 16 17 17 18 19 19 20 20 21 8 9 9 10 10 11 11 12 12 13 14 14 15 15 16 16 17 17 18 18 19 20 20 21 21 8 8 9 9 10 10 11 12 12 13 13 14 14 15 15 16 16 17 18 18 19 19 20 20 21 8 9 9 10 10 11 11 12 13 13 14 14 15 15 16 16 17 17 18 19 19 20 20 21 21 8 8 9 9 10 11 11 12 12 13 13 14 14 15 15 16 17 17 18 18 19 19 20 20 21 8 9 9 10 10 11 12 12 13 13 14 14 15 15 16 16 17 18 18 19 19 20 20 21 21 8 8 9 10 10 11 11 12 12 13 13 14 14 15 16 16 17 17 18 18 19 19 20 20 21 8 9 9 10 11 11 12 12 13 13 14 14 15 15 16 17 17 18 18 19 19 20 20 21 21 * : single-scan note 1: the p osition of sin g le-scan is able to be chan g ed b y usc [2, 1, 0] table 6 single-scan position (ntsc mode (mode no. 5) in under-scan)
19 nl6448ac33 - 15 table 7 masking mode (top and bottom side) msk1 msk0 mode selection (top and bottom side) 0 0 without masking 0 1 each side : 40 lines 1 0 each side : 12 lines note 1 : though the display position can be changed with hd (horizontal display position) or vd (vertical display position), the masking position can not change. note 2 : masking mode is effective in the mode no.5 or 6. (refer to table 1) note 3 : masking mode is not effective in under-scan. masking masking image top side bottom side
20 nl6448ac33 - 15 8. input signal timing (a) (1) vgaC640 480 pixels (mode no.0) cntsel = h or open (internal control : standard mode) parameter symbol time frequency remark frequency l / tc 39.722 ns 25.175 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 31.778 m s 31.469 khz 800clk display period thd 25.422 m s CC 640clk front-porch thf 0.636 m s CC 16clk hsync pulse-width thp 3.813 m s CC 96clk back-porch thb 1.907 m s CC 48clk hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 16.683 ms 59.94 hz 525h display period tvd 15.253 ms CC 480h vsync front-porch tvf 0.350 ms CC 11h pulse-width tvp 0.063 ms CC 2h back-porch tvb 1.017 ms CC 32h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC note 1 : except for display period (thd, tvd), analog rgb signal should be black level. parameter symbol time frequency remark frequency l / tc 39.722 ns 25.175 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 31.778 m s 31.469 khz 800clk display period thd 25.422 m s CC 640clk front-porch thf 0.636 m s CC 16clk hsync pulse-width thp 3.813 m s CC 96clk back-porch thb 1.907 m s CC 48clk hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 14.268 ms 70.09 hz 449h display period tvd 12.711 ms CC 400h vsync front-porch tvf 0.381 ms CC 12h pulse-width tvp 0.063 ms CC 2h back-porch tvb 1.112 ms CC 35h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC (2) vgaC640 400 pixels (mode no.1) note 1 : except for display period (thd, tvd), analog rgb signal should be black level.
21 nl6448ac33 - 15 parameter symbol time frequency remark frequency l / tc 39.722 ns 25.175 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 31.778 m s 31.469 khz 800clk display period thd 25.422 m s CC 640clk front-porch thf 0.636 m s CC 16clk hsync pulse-width thp 3.813 m s CC 96clk back-porch thb 1.907 m s CC 48clk hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 16.683 ms 59.94 hz 525h display period tvd 15.253 ms CC 480h vsync front-porch tvf 0.191 ms CC 6h pulse-width tvp 0.063 ms CC 2h back-porch tvb 1.176 ms CC 37h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC (3) pc9801C640 480 pixels (mode no.2) note 1 : except for display period (thd, tvd), analog rgb signal should be black level. parameter symbol time frequency remark frequency l / tc 47.5 ns 21.0526 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 40.28 m s 24.83 khz 848clk display period thd 30.4 m s CC 640clk front-porch thf 3.04 m s CC 64clk hsync pulse-width thp 3.04 m s CC 64clk back-porch thb 3.08 m s CC 80clk hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 17.723 ms 56.42 hz 440h display period tvd 16.112 ms CC 400h vsync front-porch tvf 0.282 ms CC 7h pulse-width tvp 0.322 ms CC 8h back-porch tvb 1.007 ms CC 25h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC (4) pc9801C640 400 pixels (mode no.3) note 1 : except for display period (thd, tvd), analog rgb signal should be black level.
22 nl6448ac33 - 15 parameter symbol time frequency remark frequency l / tc 33.069 ns 30.240 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 28.571 m s 35.000 khz 864clk display period thd 21.164 m s CC 640clk front-porch thf 2.116 m s CC 64clk hsync pulse-width thp 2.116 m s CC 64clk back-porch thb 3.175 m s CC 96clk hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 15.000 ms 66.667 hz 525h display period tvd 13.714 ms CC 480h vsync front-porch tvf 0.086 ms CC 3h pulse-width tvp 0.086 ms CC 3h back-porch tvb 1.114 ms CC 39h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC (5) mac (mode no.4) note 1 : except for display period (thd, tvd), analog rgb signal should be black level.
23 nl6448ac33 - 15 parameter symbol time frequency remark frequency l / tc 79.443 ns 12.5875 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 63.556 m s 15.734 khz 800clk ) display period thd 50.844 m s CC 640clk ) pulse-width thp 4.7 m s CC (59clk) hsync t hp + t hb C 9.7 m s CC (122clk) hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 16.683 ms 59.94 hz 262.5h vsync display period tvd 15.253 ms CC 240h pulse-width tvp 0.191 ms CC 3h t hp + t hb C 1.080 ms CC 17h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC period tf 33.367 ms 29.97 hz CC field vsync-field timing tfh 1 hsync (min.) CC CC field-vsync timing tfs 1 hsync (min.) CC CC (6) ntsc (mode no.5) note 1 : except for display period (thd, tvd), analog rgb signal should be black level. 1 2 3 4 5 478 479 480 lcd-line no. 21 line 21 line 22 line 22 line 23 line 259 line 260 line 260 line (a) first field 284 line 285 line 285 line 286 line 286 line 523 line 523 line 524 line (b) second field display line of mtsc (vertical display position = 17)
24 nl6448ac33 - 15 parameter symbol time frequency remark frequency l / tc 79.443 ns 12.5875 mhz CC clk duty tch / tc 0.4 to 0.6 CC CC rise / fall tcrf 10 ns (max.) CC CC period th 64.0 m s 15.625 khz 805clk ) display period thd 50.8 m s CC 640clk ) pulse-width thp 4.7 m s CC (59clk) hsync t hp + t hb C 9.7 m s CC (122clk) hsync-vsync timing thvh 1 clk (min.) CC CC vsync-hsync timing thvs 8 ns (min.) CC CC rise / fall thrf 10 ns (max.) CC CC period tv 16.683 ms 50.00 hz 312.5h vsync display period tvd 15.253 ms CC 287h pulse-width tvp 0.191 ms CC 3h t hp + t hb C 1.208 ms CC 27h analog rgb setup timing trgbs 10 ns (min.) CC rgb note 1 signal rgb hold timing trgbh 10 ns (min.) CC de-clk timing tes 8 ns (min.) CC CC de clk-de timing teh 8 ns (min.) CC CC rise / fall terf 10 ns (max.) CC CC period tf 33.367 ms 29.97 hz CC field vsync-field timing tfh 1 hsync (min.) CC CC field-vsync timing tfs 1 hsync (min.) CC CC (7) pal (mode no.6) note 1 : except for display period (thd, tvd), analog rgb signal should be black level.
25 nl6448ac33 - 15 display line of pal (vertical display position = 27) 1 2 3 4 478 479 480 lcd-line no. 28 line 28 line 29 line 29 line 5 6 7 8 30 line 31 line 31 line 32 line 9 10 11 12 32 line 33 line 33 line 34 line 13 14 15 35 line 35 line 36 line 306 line 306 line 307 line (a) first field 340 line 341 line 341 line 342 line 342 line 343 line 344 line 344 line 345 line 345 line 346 line 346 line 347 line 348 line 348 line 618 line 619 line 619 line (b) second field * : single-scan note : single-scan is repeated every third line or every fourth line.
26 nl6448ac33 - 15 9. input signal timing (b) tv tvp tvb tvf tvd vsync display period de th thp hsync display period de thb thf display period: these do not exist signals. thd
27 nl6448ac33 - 15 tc 1.5 v clk de hsync analog rgb signal vdil vdih 1.5 v vdil note: analog rgb signal should be black level in invalid. vdih invalid invalid 0 639 1.5 v vdil vdih vdih = 2.2 v to v cc vdil = 0 to 0.8 v tch t crf t crf t rgbs teh tes teh t erf t erf t hrf t hrf tes t rgbh
28 nl6448ac33 - 15 field vsync vsync hsync 1.5 v 1.5 v vdil vdih 1.5 v 1.5 v start 1 line t hvh tfh tfs tfh tfs t hvs 2 line vdil vdih vdih = 2.2 v to v cc vdil = 0 to 0.8 v
29 nl6448ac33 - 15 52512345678910 262 field hsync csync (2) even number vsync field hsync csync (1) odd number field vsync field hsync csync * csync: composite synchronous signal (2) even number field vsync field hsync csync (1) odd number field 10. definition of line numbers in ntsc mode 11. definition of line numbers in pal mode vsync 263 (1) 264 (2) 265 (3) 266 (4) 267 (5) 268 (6) 269 (7) 270 (8) 271 (9) 272 6226236246251234567 310 309 311 312 313 (1) 314 (2) 315 (3) 316 (4) 317 (5) 318 (6) 319
30 nl6448ac33 - 15 clk analog 0 tc tch t crf tsc t c t srf teh tes teh t erf t hch t hcs t hrf t hvh tfh tfs tfh tfs t hvs 00 01 t erf tes 639 invalid invalid r g b 90% 50% 10% de clk hsync hsync vsync vsync field 1.5 v vdil vdih 1.5 v vdil vdih 1.5 v vdil vdih 1.5 v vdil vdih 1.5 v vdil vdih note: analog rgb signal should be black level in invalid. vdih = 2.2 v to v cc vdil = 0 to 0.8 v
31 nl6448ac33 - 15 invalid mode no.0 (refer to table 1) vsync hsync 1 line 34 line 1clk 1 2 144 145 144clk 640clk 480 line 012 34 de clk de display (normal scanning) d (x, y) note: analog rgb signal should be black level in invalid hsync analog rgb analog rgb d(x, 0) d(x, 1) d(x, 479) invalid invalid d(0, y) d(1, y) d(2, y) d(639, y) invalid 12. input signal and display position (vga-640 480 pixels: default) d (0, 0) d (0, 1) d (0, 2) d (0, 479) d (1, 0) d (1, 1) d (1, 479) d (2, 0) d (2, 479) d (639, 0) d (639, 479)
32 nl6448ac33 - 15 display (reverse scanning) d (x, y) d (639, 479) d (639, 478) d (639, 477) d (639, 0) d (638, 479) d (638, 478) d (638, 0) d (637, 479) d (637, 0) d (0, 0) cn2 normal scanning d (0, 479) cn1 d (639, 0) d (0, 479) cn4 cn3 d (639, 479) d (639, 479) d (0, 0) d (639, 0) reverse scanning cn1 cn2 cn3 wider viewing angle without image reversal: up side view clamp pulse define the black level of analog rgb signals. hsync ta clamp wider viewing angle without image reversal: down side view cn4 d (0, 479) d (0, 0) 13. clamp pulse mod3 0 0 0 0 0 0 0 mod2 0 0 0 0 1 1 1 mod1 0 0 1 1 0 0 1 mod0 0 1 0 1 0 1 0 mode vga (480) vga (400) pc98 (480) pc98 (400) mac ntsc pal t a [clk] 18 18 18 15 18 10 10 note : the black level of analog rgb signal in clamp is basis. and noise signals should not be input because of avoiding the display ununiformity.
33 nl6448ac33 - 15 14. optical characteristics ta = 25 c note 1 parameter symbol condition min. typ. max. unit remark horizontal vertical contrast ratio response time color gamut luminance brightness uniformity q x + cr>10, q y = 0 q x C cr>10, q y = 0 q x + cr>10, q x = 0 q x C cr>10, q x = 0 cr note 3 tpd white to black c at center, to ntsc lu note 3 C max. / min. 40 50 C deg. 40 50 C deg. note 2 10 15 C deg. 40 45 C deg. 80 150 C C note 4 C 15 40 ms note 5 40 55 C % C 150 200 C cd / m 2 note 6 C C 1.25 C note 7 viewing angle range note 1 :v cc = 5.0 v, v dd1 = 12.0 v, v dd2 = 12.0 v note 2 : definitions of viewing angle are as follows. normal upper left q x q y q y+ q x+ right lower 12 0'clock note 3 : viewing angle is q x = 0 , q y = 0 . at center. note 4 : the contrast ratio is calculated by using the following formula. brightness (luminance) with all pixels in white brightness with all pixels in black the brightness is measured in darkroom. note 5 : definition of response time is as follows. photodetector output signal is measured when the brightness changes "white" to black. response time is the time between 10% and 90% of the photodetector output amplitude. contrast ratio (cr) = 10% 90% white black luminance (respon) tpd
34 nl6448ac33 - 15 note 6 : the luminance is measured after 20 minutes from the module works, with all pixels in "white". note 7 : the brightness uniformity is calculated by using following formula. maximum brightness minimum brightness the brightness is measured at near the five points shown below. brightness uniformity = 14 line column (133) (400) (667) (100) (300) (500) 2 3 5 1 50 cm lcd module photodetector (topcon bm-5a)
35 nl6448ac33 - 15 next figures and sentence are very important, please understand these contents as foiiows. caution this figure is a mark that you will get hurt and/or the module will have damages when you make a mistake to operate. this figure is a mark that you will get hurt when you make a mlstake to operate this figure is a mark that you wlll get an electric shock when you make a mistake to operate. this figure is a mark that the lcd module will give out smoke or eatch fire when you make a mistake to operate. caution do not touch an inverter --on which is stuck a caution label-- while the lcd module is under the operatlon, because of dangerous high voltage. (1) caution when taking out the module <1> pick the pouch only, in taking out module from a carrier box. (2) caution for handling the module <1> as the electrostatic discharges may break the lcd module, handle the lcd module with care against electrostatlc discharges. <2> as the lcd panel and backllght element are made from fragjle glass material, impulse and pressure to the lcd module should be avoided. <3> as the surface of polarizer is very soft and easily scratched, use a soft dry cloth without chemicals for cleaning. <4> do not pull the interface connectors in or out while the lcd module is operating. <5> put the module display side down on a flat horizontal plane. <6> handle connectors and cables with care. <7> when the module is operating, do not lose clk, hsync, or vsync slgnal. if any one of these signals is lost, the lcd panel would be damaged. <8> obey the supply voltage sequence. if wrong sequence is applied, the module wouldbe damaged. <9> the torque to nrounting screw should never exceed 0.294 n?m (3 kgf?cm). (3) caution for the atmosphere <1> dew drop atmosphere should be avoided.
36 nl6448ac33 - 15 <2> do not store and/or operate the lcd module in a high temperature and/or high humidity atmosphere. storage in an electro-conductive polymer packlng pouch and under relatively low temperature atmos- phere is recommended. <3> this module uses cold cathod fluorescent lamp. therefore, the life time of lamp becomes short conspicuously at low temperature. <4> do not operate the lcd module in a high magnetic field. (4) caution for the module characteristics <1> do not apply fixed pattern data signal to the lcd module at product agjng. applying fixed pattern for a long time may cause image sticking. (5)other cautions <1> do not disassemble and/or reassemble lcd module. <2> do not readjust variable resistor or switch etc. <3> when returning the module for repair or etc, please pack the module not to be broken. we recommend to the original shipping packages. <4> turn off the power supply to avoid electrical shock while backlight lamp is replaced, and the backlight replace manual. liquid crystal dlsplay has the following specific characteristics. there are not defects or malfunctions. the display condition of lcd module may be affected by the ambient temperature. the lcd module uses cold cathode tube for backlightlng. optical characteristics, like luminance or uniformity, will change during time. uneven brightness and/or small spots may be noticed depending on different display patterns.
37 nl6448ac33 - 15 outline drawing (unit in mm) lamp cable (8.0) (10) 196.0 0.5 2.9 0.3 1.8 0.3 147.0 0.3 24 (max.) 4- 3.4 0.2 mounting hole f 12 (max.) (17) (8) (8) (45) 18.5 (max.) (5.7) (158.4) (active area) (122.6) (active area center) (161.4) (bezel opening) (211.2) (active area) (216.2) (bezel opening) 242.0 0.3 (17.0) (14.5) (4.5) 251.0 0.5 (121.0) (mocule center) active area center active area (211.2 158.4) bezel opening (216.2 161.4) mocule center (7.2) (73.5) (module center) (active area center) * note 1 : the value in parentheses are for reference. note 2 : the tarque to mounting screw should never exceed 0.29 nem (3kgfecm)
38 nl6448ac33 - 15 the tft color lccd panel contains cold cathode fruorescent lamps. please follow local orsinances or reoulations for its disposal (90.0) (66.2) (40.55) 0 cn2 cn4 cn1 interface connector cn1 il-z-10pl-smty (jae) cn4 il-z-15pl-smty (jae) cn2 il-z-13pl-smty (jae) interface connector cn3 il-z-11pl-smty (jae) (73.5) note 1 : the value in parentheses are for reference. (221.5) (4.5)
39 nl6448ac33 - 15
no part of this document may be copied in any form or by any means without the prior written consent of nec corporation. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. nl6448ac33 - 15

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